Bob Ka-Man Wong
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2000–2000
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | ISCAS | Low complexity VLSI implementation of a joint successive interference cancellation with interleaving scheme. | Bob Ka-Man Wong, Chi-Ying Tsui, Roger S.-K. Cheng |