Burnell G. West
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
1
Active years
1983–2004
Best venue rank
A
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | ITC | Open Architecture ATE: Prospects and Problems. | Burnell G. West |
| 2004 | ITC | Digital Synchronization for Reconfigurable ATE. | Burnell G. West, Michael F. Jones |
| 2003 | ITC | Simultaneous Bidirectional Test Data Flow for a Low-cost Wafer Test Strategy. | Burnell G. West |
| 2003 | ITC | Multi-GB/s IC Test Challenges and Solutions. | Burnell G. West |
| 2002 | ITC | Open ATE Architecture: Key Challenges. | Burnell G. West |
| 2001 | ITC | Rapid-response temperature control provides new defect screening opportunities. | Mark Malinoski, Burnell G. West |
| 2000 | ITC | The path to one-picosecond accuracy. | Luca Sartori, Burnell G. West |
| 1999 | ITC | Accuracy requirements in at-speed functional test. | Burnell G. West |
| 1999 | ITC | At-speed structural test. | Burnell G. West |
| 1998 | ITC | Functional ATE can meet the challenges. | Burnell G. West |
| 1994 | ITC | 500-MHz Testing on a 100-MHz Tester. | Didier Wimmers, Kris Sakaitani, Burnell G. West |
| 1983 | ITC | Attainable Accuracy of Autocalibrating VLSI Test Systems. | Burnell G. West |