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Camille Leroux

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

11

Venues

6

Active years

2007–2026

Best venue rank

A*

Where they publish

Papers

11 indexed papers, newest first.

YearVenueTitleAuthors
2026WCNCDesign of near-ML Performance PAC Codes with Moderate SCL Decoding Complexity.Afaf Alaoui Mrani, Romain Tajan, Camille Leroux, Christophe Jgo
2025RSPFrom Concept to FPGA Prototype: System Design and Verification for the Control of 3-Phase Permanent Magnet Synchronous Motors.Maxime Gras-Chevalier, Christophe Jgo, Camille Leroux, Franck Guillemard
2023ISCASAsteRISC: A Size-Optimized RISC-V Core for Design Space Exploration.Jonathan Saussereau, Camille Leroux, Jean-Baptiste Bgueret, Christophe Jgo
2022SiggraphAHellscape.Alixe Devaux, Camille Leroux, Flicia Poggi, Clmence Lacoume, Lara Brire, Valentine Wilke, Philippe Meis
2018ISCASCustom Low Power Processor for Polar Decoding.Mathieu Lonardon, Camille Leroux, David Binet, J. M. Pierre Langlois, Christophe Jgo, Yvon Savaria
2018PPoPPMIPP: a Portable C++ SIMD Wrapper and its use for Error Correction Coding in 5G Standard.Adrien Cassagne, Olivier Aumage, Denis Barthou, Camille Leroux, Christophe Jgo
2016ICASSPMemory reduction techniques for successive cancellation decoding of polar codes.Bertrand Le Gal, Camille Leroux, Christophe Jgo
2016ISCASA scalable 3-phase polar decoder.Bertrand Le Gal, Camille Leroux, Christophe Jgo
2015ISCASPartial sums computation in polar codes decoding.Guillaume Berhault, Camille Leroux, Christophe Jgo, Dominique Dallet
2011ICASSPHardware architectures for successive cancellation decoding of polar codes.Camille Leroux, Ido Tal, Alexander Vardy, Warren J. Gross
2007ISCASTowards Gb/s turbo decoding of product code onto an FPGA device.Camille Leroux, Christophe Jgo, Patrick Adde, Michel Jzquel