| 2026 | ISCAS | HOLMES: Hierarchical Optimization with poLygonal ModEling for Large-Scale AMS Placement. | Guanhua Chen, Yujie Yan, Jiahua Liu, Zecheng Xu, Linxi Qiu, Yumao Wu, Zhiang Wang, Changhao Yan, Zhaori Bi, Keren Zhu |
| 2026 | ISCAS | Layout-Aware Standard Cell Synthesis via Reparameterization Multi-Task Bayesian Optimization. | Zhouyang Wu, Ruiyu Lyu, Keren Zhu, Zhiang Wang, Zhaori Bi, Changhao Yan, Xuan Zeng |
| 2025 | DAC | MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing. | Wangzhen Li, Yuan Meng, Ruiyu Lyu, Changhao Yan, Keren Zhu, Zhaori Bi, Dian Zhou, Xuan Zeng |
| 2025 | DAC | Look Before You Leap: A Self-Review Bayesian Optimization Method for Constrained High-Dimensional Design Space Exploration. | Xuyang Zhao, Yiyang Zhao, Zheng Wu, Tianning Gao, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2025 | DATE | INTO-OA: Interpretable Topology Optimization for Operational Amplifiers. | Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2025 | ICCAD | LCTMwalk: GPU-Accelerated Transient Thermal Simulation for Liquid-Cooled 2.5D/3D ICs via Random Walks on Circuit Networks of Modified Compact Thermal Models. | Zhixuan Dong, Yonghan Luo, Yuan Meng, Changhao Yan, Zhaori Bi, Keren Zhu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2025 | ICCAD | NSTherm: An Error-Bounded Network-Stochastic Fusion Thermal Simulator for Geometry-Adaptable Chiplets via Diffeomorphic Mapping and Neural-Guided Variance Reduction. | Yuan Meng, Yuyan Wang, Zhixuan Dong, Yonghan Luo, Changhao Yan, Keren Zhu, Zhaori Bi, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2025 | ICCAD | BAGNet: A Boundary-Aware Graph Neural Network for SRAM Yield Analysis in Post-LayoutSimulation. | Haoyang Sang, Changhao Yan, Zhaori Bi, Keren Zhu, Xuan Zeng |
| 2025 | ICCAD | Seeing Through Designs: Attention-Based Knowledge Transfer for Preference-Guided Microarchitecture Search. | Yiyang Zhao, Xuyang Zhao, Zhaori Bi, Ming Zhu, Qiwei Zhan, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2024 | ASPDAC | A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper). | Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2024 | ASPDAC | Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing. | Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng |
| 2024 | DAC | HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing. | Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng |
| 2024 | DAC | EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration. | Handa Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2024 | DATE | tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling. | Tianchen Gu, Jiaqi Wang, Zhaori Bi, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, Xuan Zeng |
| 2024 | DATE | Circuits Physics Constrained Predictor of Static IR Drop with Limited Data. | Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng |
| 2024 | ICCAD | AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis. | Jintao Li, Haochang Zhi, Ruiyu Lyu, Wangzhen Li, Zhaori Bi, Keren Zhu, Yanhan Zeng, Weiwei Shan, Changhao Yan, Fan Yang, Yun Li, Xuan Zeng |
| 2024 | ICCAD | Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis. | Ruiyu Lyu, Aidong Zhao, Yuan Meng, Keren Zhu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng |
| 2024 | UAI | Exploring High-dimensional Search Space via Voronoi Graph Traversing. | Aidong Zhao, Xuyang Zhao, Tianchen Gu, Zhaori Bi, Xinwei Sun, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng |
| 2023 | DAC | cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis. | Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng |
| 2022 | ASPDAC | A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench. | Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou |
| 2022 | DAC | An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling. | Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng |
| 2022 | ICCAD | A High-Precision Stochastic Solver for Steady-State Thermal Analysis with Fourier Heat Transfer Robin Boundary Conditions. | Longlong Yang, Cuiyang Ding, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2022 | ISCAS | A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion. | Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng |
| 2022 | ISCAS | SAT-based Scheduling Algorithm for High-level Synthesis Considering Resource Sharing. | Hao Jiang, Fan Yang, Changhao Yan, Xuan Zeng |
| 2021 | ASPDAC | A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization. | Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2021 | DAC | NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis. | Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng |
| 2021 | DAC | Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization. | Jialin Lu, Liangbo Lei, Fan Yang, Changhao Yan, Xuan Zeng |
| 2021 | DATE | An Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays. | Yue Shen, Changhao Yan, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2021 | ISCAS | Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process. | Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2020 | DAC | An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits. | Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2020 | DATE | An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling. | Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2019 | DAC | An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. | Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu |
| 2019 | DATE | An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel. | Xin Wei, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2019 | DATE | Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. | Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2018 | DAC | Multi-objective bayesian optimization for analog/RF circuit synthesis. | Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2018 | DAC | A general graph based pessimism reduction framework for design optimization of timing closure. | Fulin Peng, Changhao Yan, Chunyang Feng, Jianquan Zheng, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2018 | DAC | An efficient Bayesian yield estimation method for high dimensional and high sigma SRAM circuits. | Jinyuan Zhai, Changhao Yan, Sheng-Guo Wang, Dian Zhou |
| 2018 | ICML | Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design. | Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2017 | ASPDAC | An efficient algorithm for stencil planning and optimization in E-beam lithography. | Jiabei Ge, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2017 | ASPDAC | Network flow based cut redistribution and insertion for advanced 1D layout design. | Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2017 | DAC | Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits. | Mengshuo Wang, Fan Yang, Changhao Yan, Xuan Zeng, Xiangdong Hu |
| 2017 | DATE | Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits. | Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2017 | ICCAD | Impact of circuit-level non-idealities on vision-based autonomous driving systems. | Handi Yu, Changhao Yan, Xuan Zeng, Xin Li |
| 2017 | ISCAS | Layout decomposition for hybrid E-beam and DSA double patterning lithography. | Yunfeng Yang, Fan Yang, Wai-Shing Luk, Changhao Yan, Xuan Zeng, Xiangdong Hu |
| 2017 | ISPA | A Novel N-Retry Transactional Memory Model for Multi-Thread Programming. | Kun Lu, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2016 | DATE | Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data. | Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng, Dian Zhou |
| 2016 | ICCAD | A novel unified dummy fill insertion framework with SQP-based optimization method. | Yudong Tao, Changhao Yan, Yibo Lin, Sheng-Guo Wang, David Z. Pan, Xuan Zeng |
| 2015 | ASPDAC | Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography. | Yunfeng Yang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng, Dian Zhou |
| 2013 | ICCAD | Layout decomposition with pairwise coloring for multiple patterning lithography. | Ye Zhang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng |
| 2011 | DATE | An efficient algorithm for multi-domain clock skew scheduling. | Yanling Zhi, Wai-Shing Luk, Hai Zhou, Changhao Yan, Hengliang Zhu, Xuan Zeng |
| 2011 | ICCAD | A new method for multiparameter robust stability distribution analysis of linear analog circuits. | Changhao Yan, Sheng-Guo Wang, Xuan Zeng |
| 2009 | DAC | Provably good and practically efficient algorithms for CMP dummy fill. | Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xuan Zeng |
| 2008 | ASPDAC | Efficient techniques for 3-D impedance extraction using mixed boundary element method. | Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu, Changhao Yan |
| 2008 | DAC | Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. | Yi Wang, Wai-Shing Luk, Xuan Zeng, Jun Tao, Changhao Yan, Jiarong Tong, Wei Cai, Jia Ni |
| 2006 | ASPDAC | Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method. | Changhao Yan, Wenjian Yu, Zeyi Wang |