Chen-Yang Lin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2009–2018
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | ISCAS | A 188-Length Full Code Rate 333Mbps 1.08mm | Po-Hsun Chang, Chen-Yang Lin, Chia-Hsiang Sun, Yen-Chin Liao, Hsie-Chia Chang |
| 2010 | ISCAS | A multiple code-rate turbo decoder based on reciprocal dual trellis architecture. | Chen-Yang Lin, Cheng-Chi Wong, Hsie-Chia Chang |
| 2009 | IROS | A new compliant motion control design of a walking-help robot based on motor current and speed measurement. | Kai-Tai Song, Chen-Yang Lin |