Cheng-Tao Hsieh
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2004–2008
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | ASPDAC | Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA. | Cheng-Tao Hsieh, Jason Cong, Zhiru Zhang, Shih-Chieh Chang |
| 2006 | ASPDAC | Delay variation tolerance for domino circuits. | Kai-Chiang Wu, Cheng-Tao Hsieh, Shih-Chieh Chang |
| 2004 | DAC | Re-synthesis for delay variation tolerance. | Shih-Chieh Chang, Cheng-Tao Hsieh, Kai-Chiang Wu |
| 2004 | ICCAD | A vectorless estimation of maximum instantaneous current for sequential circuits. | Cheng-Tao Hsieh, Jian-Cheng Lin, Shih-Chieh Chang |