Chi-Sang Poon
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2007–2018
Best venue rank
B
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | DATE | Low-power 3D integration using inductive coupling links for neurotechnology applications. | Benjamin J. Fletcher, Shidhartha Das, Chi-Sang Poon, Terrence S. T. Mak |
| 2012 | FPL | A scalable FPGA-based design for field programmable large-scale ion channel simulations. | Graeme Coapes, Terrence S. T. Mak, Junwen Luo, Alex Yakovlev, Chi-Sang Poon |
| 2010 | FPL | A Reconfigurable Hebbian Eigenfilter for Neurophysiological Spike Train Analysis. | Bo Yu, Terrence S. T. Mak, Xiangyu Li, Fei Xia, Alexandre Yakovlev, Yihe Sun, Chi-Sang Poon |
| 2007 | ISCAS | A Current-Mode Analog Circuit for Reinforcement Learning Problems. | Terrence S. T. Mak, Kai-Pui Lam, H. S. Ng, Guy Rachmuth, Chi-Sang Poon |