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Chi-Yi Hwang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

3

Active years

1989–2002

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2002DATEA Hierarchical Test Scheme for System-On-Chip Designs.Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin
1991DACAn Efficient Layout Style for 2-Metal CMOS Leaf Cells And Their Automatic Generation.Chi-Yi Hwang, Yung-Ching Hsieh, Youn-Long Lin, Yu-Chin Hsu
1991DACChannel Density Reduction by Routing Over The Cells.Min-Siang Lin, Hourng-Wern Perng, Chi-Yi Hwang, Youn-Long Lin
1990DACLiB: A Cell Layout Generator.Yung-Ching Hsieh, Chi-Yi Hwang, Youn-Long Lin, Yu-Chin Hsu
1989ICCADAn optimal transistor-chaining algorithm for CMOS cell layout.Chi-Yi Hwang, Yung-Ching Hsieh, Youn-Long Lin, Yu-Chin Hsu