Chien-Ching Lin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2004–2008
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | ISCAS | Multi-mode message passing switch networks applied for QC-LDPC decoder. | Chih-Hao Liu, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee, Yarsun Hsua |
| 2004 | ISCAS | Multi-level memory systems using error control codes. | Hsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang |
| 2004 | ISCAS | A power and area efficient multi-mode FEC processor. | Yi-Chen Tseng, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee |