Chien-Ming Wu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
22
Venues
4
Active years
1999–2024
Best venue rank
C
Where they publish
Papers
22 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | IJCNN | LSvT: EEG Channel Localization and Selection via Training for BCI Applications. | Chun-Ming Huang, Wei-Lin Lai, Chih-Chyau Yang, Yi-Jie Hsieh, Chien-Ming Wu, Chu-Hui Lee |
| 2023 | IECON | DLA-SP: A System Platform for Deep-Learning Accelerator Integration. | Chih-Chyau Yang, Chun-Yu Chen, Fu-Chen Cheng, Tsung-Jen Hsieh, Chien-Ming Wu, Chun-Ming Huang |
| 2019 | ISCAS | A Smart Sensor Development Platform and Its System Demonstration. | Chun-Ming Huang, Chih-Chyau Yang, Yi-Jie Hsieh, Chun-Wen Cheng, Yi-Jun Liu, Jia-Rong Chang, Yu-Tsang Chang, Chien-Ming Wu |
| 2017 | ISCAS | A modular wireless sensor platform and its applications. | Chun-Ming Huang, Yi-Jie Hsieh, Wei-Lin Lai, Yi-Jun Liu, Chun-Ying Juan, Ssu-Ying Chen, Chun-Yu Chen, Jin-Ju Chue, Chih-Chyau Yang, Chien-Ming Wu |
| 2010 | ISCAS | Design of high-speed bit-serial divider in GF(2 | Wen-Ching Lin, Ming-Der Shieh, Chien-Ming Wu |
| 2010 | ISCAS | Efficient memory management for FFT processors. | Hsin-Fu Luo, Ming-Der Shieh, Yi-Jun Liu, Chien-Ming Wu |
| 2010 | ISCAS | Low-complexity Reed-Solomon decoder for optical communications. | Yung-Kuei Lu, Ming-Der Shieh, Chien-Ming Wu |
| 2009 | ISCAS | Implementation and Prototyping of a Complex Multi-project System-on-a-chip. | Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Wei-De Chien, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Chin-Long Wey |
| 2009 | ISCAS | Flexible GF(2 | Wen-Ching Lin, Ming-Der Shieh, Chien-Ming Wu |
| 2009 | MDM | True Event Decision by Cooperative Sensor Network. | Pei-Lin Hou, Chia-Shin Yen, Chien-Ming Wu, Kun-Cheng Tsai |
| 2008 | ISCAS | PrSoC: Programmable System-on-chip (SoC) for silicon prototyping. | Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Chin-Long Wey |
| 2006 | ISCAS | Efficient path metric access for reducing interconnect overhead in Viterbi decoders. | Ming-Der Shieh, Tai-Ping Wang, Chien-Ming Wu, Chun-Ming Huang |
| 2005 | ISCAS | Concurrent algorithm for high-speed point multiplication in elliptic curve cryptography. | Jun-Hong Chen, Ming-Der Shieh, Chien-Ming Wu |
| 2004 | ISCAS | VLSI architecture exploration for sliding-window Log-MAP decoders. | Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen, Hsin-Fu Lo |
| 2003 | ISCAS | Implementation of channel demodulator for DAB system. | Chien-Ming Wu, Ming-Der Shieh, Hsin-Fu Lo, Min-Hsiung Hu |
| 2002 | ISCAS | Memory arrangements in turbo decoders using sliding-window BCJR algorithm. | Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu |
| 2002 | ISCAS | An area-efficient systolic division circuit over GF(2 | Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang |
| 2001 | ISCAS | Design of an efficient FFT processor for DAB system. | Hsin-Fu Lo, Ming-Der Shieh, Chien-Ming Wu |
| 2001 | ISCAS | VLSI architecture of extended in-place path metric update for Viterbi decoders. | Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu |
| 2001 | ISCAS | Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity design. | Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang |
| 2000 | ISCAS | An efficient approach for in-place scheduling of path metric update in Viterbi decoders. | Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu |
| 1999 | ISCAS | An area-efficient versatile Reed-Solomon decoder for ADSL. | Jin-Chuan Huang, Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu |