Chien-Nan Liu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2015–2022
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | DATE | Practical Substrate Design Considering Symmetrical and Shielding Routes. | Hao-Yu Chi, Simon Yi-Hung Chen, Hung-Ming Chen, Chien-Nan Liu, Yun-Chih Kuo, Ya-Hsin Chang, Kuan-Hsien Ho |
| 2022 | DATE | DASC: A DRAM Data Mapping Methodology for Sparse Convolutional Neural Networks. | Bo-Cheng Lai, Tzu-Chieh Chiang, Po-Shen Kuo, Wan-Ching Wang, Yan-Lin Hung, Hung-Ming Chen, Chien-Nan Liu, Shyh-Jye Jou |
| 2021 | DATE | Performance-driven Routing Methodology with Incremental Placement Refinement for Analog Layout Design. | Hao-Yu Chi, Han-Chung Chang, Chih-Hsin Yang, Chien-Nan Liu, Jing-Yang Jou |
| 2020 | ICCAD | On EDA Solutions for Reconfigurable Memory-Centric AI Edge Applications. | Hung-Ming Chen, Chia-Lin Hu, Kang-Yu Chang, Alexandra Kster, Yu-Hsien Lin, Po-Shen Kuo, Wei-Tung Chao, Bo-Cheng Lai, Chien-Nan Liu, Shyh-Jye Jou |
| 2018 | DAC | Analog placement with current flow and symmetry constraints using PCP-SP. | Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu |
| 2015 | FPGA | Toward Wave Digital Filter based Analog Circuit Emulation on FPGA (Abstract Only). | Wei Wu, Peng Gu, Yen-Lung Chen, Chien-Nan Liu, Sudhakar Pamarti, Chang Wu, Lei He |