Chien-Ping Kuo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2021–2021
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | ISCAS | 67.5-fJ Per Access 1-kb SRAM Using 40-nm Logic CMOS Process. | Chua-Chin Wang, Chien-Ping Kuo |