Ching-Yu Chin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
5
Active years
2009–2013
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | ICCAD | Efficient analog layout prototyping by layout reuse with routing preservation. | Ching-Yu Chin, Po-Cheng Pan, Hung-Ming Chen, Tung-Chieh Chen, Jou-Chun Lin |
| 2012 | ASPDAC | A fast thermal aware placement with accurate thermal analysis based on Green function. | Suradeth Aroonsantidecha, Shih-Ying Liu, Ching-Yu Chin, Hung-Ming Chen |
| 2011 | DATE | On routing fixed escaped boundary pins for high speed boards. | Tsung-Ying Tsai, Ren-Jie Lee, Ching-Yu Chin, Chung-Yi Kuan, Hung-Ming Chen, Yoji Kajitani |
| 2010 | ICCAD | Mathematical yield estimation for two-dimensional-redundancy memory arrays. | Mango Chia-Tso Chao, Ching-Yu Chin, Chen-Wei Lin |
| 2009 | DAC | Fault models for embedded-DRAM macros. | Mango Chia-Tso Chao, Hao-Yu Yang, Rei-Fu Huang, Shih-Chin Lin, Ching-Yu Chin |
| 2009 | ITC | A novel test flow for one-time-programming applications of NROM technology. | Ching-Yu Chin, Yao-Te Tsou, Chi-Min Chang, Mango Chia-Tso Chao |