| 2017 | ATVA | SamaTulyata: An Efficient Path Based Equivalence Checking Tool. | Soumyadip Bandyopadhyay, Santonu Sarkar, Dipankar Sarkar, Chittaranjan A. Mandal |
| 2017 | ATVA | An Equivalence Checking Framework for Array-Intensive Programs. | Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar |
| 2016 | VLSID | A Novel EPE Aware Hybrid Global Route Planner after Floorplanning. | Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal |
| 2015 | ICSE | Poster: An Efficient Equivalence Checking Method for Petri Net Based Models of Programs. | Soumyadip Bandyopadhyay, Dipankar Sarkar, Chittaranjan A. Mandal |
| 2015 | ICSoft | A Path-based Equivalence Checking Method for Petri Net based Models of Programs. | Soumyadip Bandyopadhyay, Dipankar Sarkar, Kunal Banerjee, Chittaranjan A. Mandal |
| 2015 | SCAM | A translation validation framework for symbolic value propagation based equivalence checking of FSMDAs. | Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar |
| 2014 | DSD | Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks. | Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay |
| 2014 | VLSID | Global Routing Using Monotone Staircases with Minimal Bends. | Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal |
| 2013 | COMAD | Determining the User Intent Behind Web Search Queries by Learning from Past User Interactions with Search Results. | Ariyam Das, Chittaranjan A. Mandal, Chris Reade |
| 2013 | DSD | Designing DPA Resistant Circuits Using BDD Architecture and Bottom Pre-charge Logic. | Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay |
| 2013 | VLSID | Verification of KPN Level Transformations. | Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Mandal |
| 2011 | WCNC | An improved greedy construction of minimum connected dominating sets in wireless networks. | Ariyam Das, Chittaranjan A. Mandal, Chris Reade, Manish Aasawat |
| 2009 | VLSID | Systematic Methodology for High-Level Performance Modeling of Analog Systems. | Soumya Pandit, Chittaranjan A. Mandal, Amit Patra |
| 2007 | WEBIST | Recipient Specific Electronic Cash - A Scheme for Recipient Specific Yet Anonymous and Tranferable Electronic Cash. | Chittaranjan A. Mandal, Chris Reade |
| 2006 | DATE | High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count. | Soumya Pandit, Sougata Kar, Chittaranjan A. Mandal, Amit Patra |
| 2006 | WEBIST | A System for Automatic Evaluation of Programs for Correctness and Performance. | Amit Kumar Mandal, Chittaranjan A. Mandal, Chris Reade |
| 2006 | WEBIST | A System for Automatic Evaluation of Programs for Correctness and Performance. | Amit Kumar Mandal, Chittaranjan A. Mandal, Chris Reade |
| 2006 | WEBIST | Animating Algorithms over the Web. | Chittaranjan A. Mandal, Chris Reade |
| 2004 | DATE | A New Approach to Timing Analysis Using Event Propagation and Temporal Logic. | Arijit Mondal, P. P. Chakrabarti, Chittaranjan A. Mandal |
| 2002 | ISCAS | Timing analysis of tree-like RLC circuits. | Bipin Rajendran, Veerbhan Kheterpal, Abhishek Das, Jayanta Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti |
| 2000 | VLSID | A Genetic Algorithm for the Synthesis of Structured Data Paths. | Chittaranjan A. Mandal, R. M. Zimmer |
| 1997 | VLSID | Design Space Exploration for Data Path Synthesis. | Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose |
| 1996 | VLSID | Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach. | Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose |
| 1992 | VLSID | Interconnect Optimization Techniques in Data Path Synthesis. | Chittaranjan A. Mandal, Partha Pratim Chakrabarti, Sujoy Ghose |