| 2016 | DAC | Self-aligned double patterning-aware detailed routing with double via insertion and via manufacturability consideration. | Yixiao Ding, Chris C. N. Chu, Wai-Kei Mak |
| 2016 | DAC | Area optimization of resilient designs guided by a mixed integer geometric program. | Hsin-Ho Huang, Huimei Cheng, Chris C. N. Chu, Peter A. Beerel |
| 2016 | DAC | Flip-flop clustering by weighted K-means algorithm. | Gang Wu, Yue Xu, Dean Wu, Manoj Ragupathy, Yu-Yen Mo, Chris C. N. Chu |
| 2016 | DATE | Simultaneous slack matching, gate sizing and repeater insertion for asynchronous circuits. | Gang Wu, Chris C. N. Chu |
| 2015 | DAC | Detailed routing for spacer-is-metal type self-aligned double/quadruple patterning lithography. | Yixiao Ding, Chris C. N. Chu, Wai-Kei Mak |
| 2015 | DAC | An efficient shift invariant rasterization algorithm for all-angle mask patterns in ILT. | Yixiao Ding, Chris C. N. Chu, Xin Zhou |
| 2015 | ICCAD | POLAR 3.0: An Ultrafast Global Placement Engine. | Tao Lin, Chris C. N. Chu, Gang Wu |
| 2015 | ICCAD | Fast Lagrangian Relaxation Based Gate Sizing using Multi-Threading. | Ankur Sharma, David G. Chinnery, Sarvesh Bhardwaj, Chris C. N. Chu |
| 2007 | ASPDAC | FastRoute 2.0: A High-quality and Efficient Global Router. | Min Pan, Chris C. N. Chu |
| 2007 | ASPDAC | A Novel Performance-Driven Topology Design Algorithm. | Min Pan, Chris C. N. Chu, Priyadarshan Patra |
| 2007 | ASPDAC | FastPlace 3.0: A Fast Multilevel Quadratic Placement Algorithm with Placement Congestion Control. | Natarajan Viswanathan, Min Pan, Chris C. N. Chu |
| 2007 | DAC | IPR: An Integrated Placement and Routing Algorithm. | Min Pan, Chris C. N. Chu |
| 2007 | DAC | RQL: Global Placement via Relaxed Quadratic Spreading and Linearization. | Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu |
| 2007 | ICCAD | The coming of age of physical synthesis. | Charles J. Alpert, Chris C. N. Chu, Paul G. Villarrubia |
| 2006 | ASPDAC | FastPlace 2.0: an efficient analytical placer for mixed-mode designs. | Natarajan Viswanathan, Min Pan, Chris C. N. Chu |
| 2006 | DAC | Optimal cell flipping in placement and floorplanning. | Chiu-Wing Sham, Evangeline F. Y. Young, Chris C. N. Chu |
| 2006 | ICCAD | Post-placement voltage island generation. | Royce L. S. Ching, Evangeline F. Y. Young, Kevin C. K. Leung, Chris C. N. Chu |
| 2006 | ICCAD | A revisit to floorplan optimization by Lagrangian relaxation. | Chuan Lin, Hai Zhou, Chris C. N. Chu |
| 2006 | ICCAD | FastRoute: a step to integrate global routing into placement. | Min Pan, Chris C. N. Chu |
| 2006 | ICCAD | Analog placement with symmetry and other placement constraints. | Yiu-Cheong Tam, Evangeline F. Y. Young, Chris C. N. Chu |
| 2005 | ICCAD | An efficient and effective detailed placement algorithm. | Min Pan, Natarajan Viswanathan, Chris C. N. Chu |
| 2005 | ICCD | Efficient Rectilinear Steiner Tree Construction with Rectilinear Blockages. | Zion Cien Shen, Chris C. N. Chu, Ying-Meng Li |
| 2005 | ISCAS | Transition time bounded low-power clock tree construction. | Min Pan, Chris C. N. Chu, J. Morris Chang |
| 2005 | ISCAS | Timing yield estimation using statistical static timing analysis. | Min Pan, Chris C. N. Chu, Hai Zhou |
| 2004 | ASPDAC | An efficient routing tree construction algorithm with buffer insertion, wire sizing and obstacle considerations. | Sampath Dechu, Zion Cien Shen, Chris C. N. Chu |
| 2004 | ASPDAC | Accurate and efficient flow based congestion estimation in floorplanning. | Zion Cien Shen, Chris C. N. Chu |
| 2003 | DATE | A New and Efficient Congestion Evaluation Model in Floorplanning: Wire Density Control with Twin Binary Trees. | Steve T. W. Lai, Evangeline F. Y. Young, Chris C. N. Chu |
| 2003 | ICCAD | Retiming with Interconnect and Gate Delay. | Chris C. N. Chu, Evangeline F. Y. Young, Dennis K. Y. Tong, Sampath Dechu |
| 2002 | DATE | Non-Rectangular Shaping and Sizing of Soft Modules in Floorplan Design. | Chris C. N. Chu, Evangeline F. Y. Young |
| 2002 | ICCD | Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model. | Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Chu |
| 2002 | VLSID | A Unified Method to Handle Different Kinds of Placement Constraints in Floorplan Design. | Evangeline F. Y. Young, Chris C. N. Chu, M. L. Ho |
| 1998 | DATE | A Polynomial Time Optimal Algorithm for Simultaneous Buffer and Wire Sizing. | Chris C. N. Chu, D. F. Wong |
| 1998 | ICCAD | Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation. | Chung-Ping Chen, Chris C. N. Chu, D. F. Wong |
| 1997 | ICCAD | A new approach to simultaneous buffer insertion and wire sizing. | Chris C. N. Chu, D. F. Wong |