Chunan Wei
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2015–2015
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | DATE | A scalable and high-density FPGA architecture with multi-level phase change memory. | Chunan Wei, Ashutosh Dhar, Deming Chen |