Chune-Sin Yeh
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1990–2000
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | ASPDAC | Gate-level aged timing simulation methodology for hot-carrier reliability assurance. | Yoshiyuki Kawakami, Jingkun Fang, Hirokazu Yonezawa, Nobufusa Iwanishi, Lifeng Wu, Alvin I-Hsien Chen, Norio Koike, Ping Chen, Chune-Sin Yeh, Zhihong Liu |
| 1990 | DAC | NASFLOW, a Simulation Tool for Silicon Technology Development. | D. David Forsythe, Atul P. Agarwal, Chune-Sin Yeh, Sheldon Aronowitz, Bhaskar Gadepally |