Ciaran Toal
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2003–2007
Best venue rank
B
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | FPL | An FPGA Based Memory Efficient Shared Buffer Implementation. | Dwayne Burns, Ciaran Toal, Kieran McLaughlin, Sakir Sezer, Mike Hutton, Kevin Cackovic |
| 2003 | FCCM | A Pipelined SoPC Architecture for 2.5 Gbps Network Processing. | Ciaran Toal, Sakir Sezer, Xing Yu |
| 2003 | FPL | Custom Tag Computation Circuit for a 10Gbps SCFQ Scheduler. | Brendan McAllister, Sakir Sezer, Ciaran Toal |
| 2003 | ISCC | A 32-Bit SoPC Implementation of a P5. | Ciaran Toal, Sakir Sezer |