Clayton B. McDonald
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
1999–2015
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | ICCAD | Efficient Transistor-Level Symbolic Timing Simulation Using Cached Partial Circuit States. | Clayton B. McDonald, Hsinwei Chou, Vijay Durairaj, Pey-Chang Kent Lin |
| 2001 | DAC | Computing Logic-Stage Delays Using Circuit Simulation and Symbolic Elmore Analysis. | Clayton B. McDonald, Randal E. Bryant |
| 2001 | ICCAD | A Symbolic Simulation-Based Methodology for Generating Black-Box Timing Models of Custom Macrocells. | Clayton B. McDonald, Randal E. Bryant |
| 2000 | DAC | Symbolic timing simulation using cluster scheduling. | Clayton B. McDonald, Randal E. Bryant |
| 1999 | ICCAD | Symbolic functional and timing verification of transistor-level circuits. | Clayton B. McDonald, Randal E. Bryant |