Cliff C. N. Sze
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
22
Venues
6
Active years
2002–2015
Best venue rank
A*
Where they publish
Papers
22 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | ASPDAC | Gate sizing and threshold voltage assignment for high performance microprocessor designs. | Tiago Reimann, Cliff C. N. Sze, Ricardo Reis |
| 2013 | ASPDAC | Mountain-mover: An intuitive logic shifting heuristic for improving timing slack violating paths. | Xing Wei, Wai-Chung Tang, Yu-Liang Wu, Cliff C. N. Sze, Charles J. Alpert |
| 2013 | DAC | Routing congestion estimation with real design constraints. | Wen-Hao Liu, Yaoguang Wei, Cliff C. N. Sze, Charles J. Alpert, Zhuo Li, Yih-Lang Li, Natarajan Viswanathan |
| 2013 | DATE | CATALYST: planning layer directives for effective design closure. | Yaoguang Wei, Zhuo Li, Cliff C. N. Sze, Shiyan Hu, Charles J. Alpert, Sachin S. Sapatnekar |
| 2013 | ICCAD | Clock power minimization using structured latch templates and decision tree induction. | Samuel I. Ward, Natarajan Viswanathan, Nancy Y. Zhou, Cliff C. N. Sze, Zhuo Li, Charles J. Alpert, David Z. Pan |
| 2013 | ICCS | Hardware Acceleration of an Efficient and Accurate Proton Therapy Monte Carlo. | Thomas H. Osiecki, Min-Yu Tsai, Anne E. Gattiker, Damir A. Jamsek, Sani R. Nassif, William Evan Speight, Cliff C. N. Sze |
| 2012 | DAC | Guiding a physical design closure system to produce easier-to-route designs with more predictable timing. | Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Cliff C. N. Sze, Natarajan Viswanathan, Nancy Y. Zhou |
| 2012 | DAC | The DAC 2012 routability-driven placement contest and benchmark suite. | Natarajan Viswanathan, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Yaoguang Wei |
| 2012 | DAC | GLARE: global and local wiring aware routability evaluation. | Yaoguang Wei, Cliff C. N. Sze, Natarajan Viswanathan, Zhuo Li, Charles J. Alpert, Lakshmi N. Reddy, Andrew D. Huber, Gustavo E. Tllez, Douglas Keller, Sachin S. Sapatnekar |
| 2012 | ICCAD | ICCAD-2012 CAD contest in design hierarchy aware routability-driven placement and benchmark suite. | Natarajan Viswanathan, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Yaoguang Wei |
| 2011 | ICCAD | The future of clock network synthesis. | Cliff C. N. Sze |
| 2006 | DAC | Timing-driven Steiner trees are (practically) free. | Charles J. Alpert, Andrew B. Kahng, Cliff C. N. Sze, Qinke Wang |
| 2006 | DAC | Fast algorithms for slew constrained minimum cost buffering. | Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K. Karandikar, Zhuo Li, Weiping Shi, Cliff C. N. Sze |
| 2006 | DATE | Integrated placement and skew optimization for rotary clocking. | Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C. N. Sze |
| 2005 | ASPDAC | Making fast buffer insertion even faster via approximation techniques. | Zhuo Li, Cliff C. N. Sze, Charles J. Alpert, Jiang Hu, Weiping Shi |
| 2005 | ASPDAC | Register placement for low power clock network. | Yongqiang Lu, Cliff C. N. Sze, Xianlong Hong, Qiang Zhou, Yici Cai, Liang Huang, Jiang Hu |
| 2005 | ASPDAC | Skew scheduling and clock routing for improved tolerance to process variations. | Ganesh Venkataraman, Cliff C. N. Sze, Jiang Hu |
| 2005 | DAC | Navigating registers in placement for clock network minimization. | Yongqiang Lu, Cliff C. N. Sze, Xianlong Hong, Qiang Zhou, Yici Cai, Liang Huang, Jiang Hu |
| 2005 | DAC | Path based buffer insertion. | Cliff C. N. Sze, Charles J. Alpert, Jiang Hu, Weiping Shi |
| 2004 | ASPDAC | A place and route aware buffered Steiner tree construction. | Cliff C. N. Sze, Jiang Hu, Charles J. Alpert |
| 2004 | ICCAD | Accurate estimation of global buffer delay within a floorplan. | Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar, Cliff C. N. Sze |
| 2002 | ISCAS | Optimal circuit clustering with variable interconnect delay. | Cliff C. N. Sze, Ting-Chi Wang |