| 2015 | IJCNN | Stochastic and asynchronous spiking dynamic neural fields. | Benoit Chappet de Vangel, Csar Torres-Huitzil, Bernard Girau |
| 2014 | ISVC | Embedded Image Processing System for Automatic Page Segmentation of Open Book Images. | Victor Rodrguez-Osoria, Marco Aurelio Nuo-Maganda, Yahir Hernndez-Mier, Csar Torres-Huitzil |
| 2012 | ISCAS | An FPGA-based approach for parameter estimation in spiking neural networks. | Horacio Rostro-Gonzlez, Guillaume Garreau, Andreas G. Andreou, Julius Georgiou, Jose Hugo Barron-Zambrano, Csar Torres-Huitzil |
| 2011 | ICIG | A Hardware Coprocessor Integrated with OpenCV for Edge Detection Using Cellular Neural Networks. | Marco Aurelio Nuo-Maganda, Miguel Morales-Sandoval, Csar Torres-Huitzil |
| 2011 | IJCNN | Two-phase GA parameter tunning method of CPGs for quadruped gaits. | Jose Hugo Barron-Zambrano, Csar Torres-Huitzil |
| 2010 | ICANN | Hardware Implementation of a CPG-Based Locomotion Control for Quadruped Robots. | Jose Hugo Barron-Zambrano, Csar Torres-Huitzil, Bernard Girau |
| 2009 | IJCNN | Hardware implementation of Spiking Neural Network classifiers based on backpropagation-based learning algorithms. | Marco Aurelio Nuo-Maganda, Miguel O. Arias-Estrada, Csar Torres-Huitzil, Bernard Girau |
| 2008 | ICANN | Implementation of Central Pattern Generator in an FPGA-Based Embedded System. | Csar Torres-Huitzil, Bernard Girau |
| 2008 | ICANN | Biologically-Inspired Digital Architecture for a Cortical Model of Orientation Selectivity. | Csar Torres-Huitzil, Bernard Girau, Miguel O. Arias-Estrada |
| 2006 | ESANN | FPGA implementation of an integrate-and-fire LEGION model for image segmentation. | Bernard Girau, Csar Torres-Huitzil |
| 2006 | FPL | Area-Efficient Implementation of a Pulse-Mode Neuron Model. | Csar Torres-Huitzil |
| 2006 | ICONIP | A Bit-Stream Pulse-Based Digital Neuron Model for Neural Networks. | Csar Torres-Huitzil |
| 2005 | IJCNN | Digital implementation of a bio-inspired neural model for motion estimation. | Csar Torres-Huitzil, Bernard Girau, Claudio Castellanos Snchez |
| 2004 | FPL | Design and Implementation of a CFAR Processor for Target Detection. | Csar Torres-Huitzil, Ren Cumplido-Parra, Santos Lpez-Estrada |
| 2003 | FPL | Configurable Hardware Architecture for Real-Time Window-Based Image Processing. | Csar Torres-Huitzil, Miguel O. Arias-Estrada |
| 2000 | FPL | Compact Spiking Neural Network Implementation in FPGA. | Selene Maya, M. Rocio Reynoso, Csar Torres-Huitzil, Miguel O. Arias-Estrada |