Skip to content

Dake Liu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

28

Venues

17

Active years

2002–2017

Best venue rank

B

Where they publish

Papers

28 indexed papers, newest first.

YearVenueTitleAuthors
2017ISCASA 3-coil simultaneous power and uplink data transmission inductive link for battery-less implantable devices.Min Li, Dake Liu, Chen Gong, Wan Qiao
2015LANMANHigh performance table-based architecture for parallel CRC calculation.Yuanhong Huo, Xiaoyang Li, Wei Wang, Dake Liu
2015TrustComEnergy-Efficient Sorting with the Distributed Memory Architecture ePUMA.Andreas Karlsson, Joar Sohl, Dake Liu
2014FPLFPGA implementation of a multi-algorithm parallel FEC for SDR platforms.Zhenzhi Wu, Dake Liu, Zheng Yang, Qingying Wang, Wei Zhou
2013HiPCConflict-free data access for multi-bank memory architectures using padding.Joar Sohl, Jian Wang, Andreas Karlsson, Dake Liu
2012DSDConvolutional Decoding on Deep-pipelined SIMD Processor with Flexible Parallel Memory.Jian Wang, Andreas Karlsson, Joar Sohl, Dake Liu
2012ISPAAutomatic Permutation for Arbitrary Static Access Patterns.Joar Sohl, Jian Wang, Andreas Karlsson, Dake Liu
2011CISISCase Study of Efficient Parallel Memory Access Programming for the Embedded Heterogeneous Multicore DSP Architecture ePUMA.Erik Hansson, Joar Sohl, Christoph W. Kessler, Dake Liu
2010DDECSNoGapWenbiao Zhou, Per Karlstrm, Dake Liu
2010DSDSoftware Programmable Data Allocation in Multi-bank Memory of SIMD Processors.Jian Wang, Joar Sohl, Olof Kraigher, Dake Liu
2010EUCImplementation of a Floating Point Adder and Subtracter in NoGAP, A Comparative Case Study.Per Karlstrm, Wenbiao Zhou, Dake Liu
2010EUCArchitectural Support for Reducing Parallel Processing Overhead in an Embedded Multiprocessor.Jian Wang, Joar Sohl, Dake Liu
2009DSDMemory Conflict Analysis and Interleaver Design for Parallel Turbo Decoding Supporting HSPA Evolution.Rizwan Asghar, Di Wu, Johan Eilert, Dake Liu
2009FPLAn ASIC perspective on FPGA optimizations.Andreas Ehliar, Dake Liu
2009ISCASLow Complexity Hardware Interleaver for MIMO-OFDM based Wireless LAN.Rizwan Asghar, Dake Liu
2009VTCImplementation Aspects of Fixed-Complexity Soft-Output MIMO Detection.Di Wu, Erik G. Larsson, Dake Liu
2008FPLA high performance microprocessor with DSP extensions optimized for the Virtex-4 FPGA.Andreas Ehliar, Per Karlstrm, Dake Liu
2008ICASSPImplementation of a programmable linear MMSE detector for MIMO-OFDM.Johan Eilert, Di Wu, Dake Liu
2008WCNCCost Analysis of Channel Estimation in MIMO-OFDM for Software Defined Radio.Qi Wang, Di Wu, Johan Eilert, Dake Liu
2007FPLAn fpga based open source network-on-chip architecture.Andreas Ehliar, Dake Liu
2007ISCASEfficient Complex Matrix Inversion for MIMO Software Defined Radio.Johan Eilert, Di Wu, Dake Liu
2007PIMRCLattice-Reduction Aided Multi-User STBC Decoding with Resource Constraints.Di Wu, Johan Eilert, Dake Liu
2006WCNCMIPS cost estimation for OFDM-VBLAST systems.Haiyan Jiao, Anders Nilsson, Eric Tell, Dake Liu
2004ICASSPReduced floating point for MPEG1/2 layer III decoding.Mikael Olausson, Andreas Ehliar, Johan Eilert, Dake Liu
2004MMSPUsing low precision floating point numbers to reduce memory cost for MP3 decoding.Johan Eilert, Andreas Ehliar, Dake Liu
2003ASPDACImplementation of fast CRC calculation.Tomas Henriksson, Dake Liu
2003ICASSPA general DSP processor at the cost of 23K gates and 1/2 a man-year design time.Eric Tell, Mikael Olausson, Dake Liu
2002ICCDEmbedded Protocol Processor for Fast and Efficient Packet Reception.Tomas Henriksson, Ulf Nordqvist, Dake Liu