Debiprasanna Sahoo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
7
Active years
2016–2025
Best venue rank
National
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | HiPC | PEEP: A Tool for PErformance Effect Prediction. | G. Ramya Sri, Debiprasanna Sahoo, Ajaya Kumar Dash |
| 2020 | ICS | Fuzzy fairness controller for NVMe SSDs. | Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam |
| 2020 | ISLPED | Slumber: static-power management for GPGPU register files. | Devashree Tripathy, Hadi Zamani, Debiprasanna Sahoo, Laxmi N. Bhuyan, Manoranjan Satpathy |
| 2019 | ICCD | Post-Model Validation of Victim DRAM Caches. | Debiprasanna Sahoo, Shivani Tripathy, Manoranjan Satpathy, Madhu Mutyam |
| 2019 | ICCD | Formal Modeling and Verification of NAND Flash Memory Supporting Advanced Operations. | Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy, Srinivas Pinisetty |
| 2019 | VLSID | Multidimensional Grid Aware Address Prediction for GPGPU. | Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy |
| 2018 | ASPDAC | CAMO: A novel cache management organization for GPGPUs. | Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, Laxmi Narayan Bhuyan |
| 2018 | CASES | DRAM cache access optimization leveraging line locking in tag cache: work-in-progress. | Shivani Tripathy, Debiprasanna Sahoo, Manoranjan Satpathy |
| 2017 | VLSID | An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors. | Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam |
| 2016 | VLSID | MSimDRAM: Formal Model Driven Development of a DRAM Simulator. | Debiprasanna Sahoo, Manoranjan Satpathy |