Didier Ne
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
2002–2005
Best venue rank
A
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | DATE | A New Embedded Measurement Structure for eDRAM Capacitor. | Laurent Lopez, Jean-Michel Portal, Didier Ne |
| 2003 | ITC | Infrastructure IP for Back-End Yield Improvement. | L. Forli, Jean-Michel Portal, Didier Ne, Bertrand Borot |
| 2003 | ITC | EEPROM Memory: Threshold Voltage Built In Self Diagnosis. | Jean-Michel Portal, Hassen Aziza, Didier Ne |
| 2002 | ISCAS | Floating-gate EEPROM cell: threshold voltage sensibility to geometry. | Jean-Michel Portal, L. Forli, Didier Ne |
| 2002 | ISCAS | Floating-gate EEPROM cell model based on MOS model 9. | Jean-Michel Portal, L. Forli, Didier Ne |
| 2002 | ITC | An Automated Methodology to Diagnose Geometric Defect in the EEPROM Cell. | Jean-Michel Portal, L. Forli, Hassen Aziza, Didier Ne |