| 2006 | CEC | Optimized Memory Assignment for DSPs. | Gary Grwal, Stelian Coros, Dilip K. Banerji, Andrew Morton, Mario Ventresca |
| 2004 | VLSID | Shrubbery: A New Algorithm for Quickly Growing High-Quality Steiner Trees. | Gary William Grewal, Thomas Charles Wilson, Ming Xu, Dilip K. Banerji |
| 2003 | VLSID | Routability Prediction for Field Programmable Gate Arrays with a Routing Hierarchy. | Zhibin Dai, Dilip K. Banerji |
| 1996 | VLSID | Instruction-Set Matching and GA-based Selection for Embedded-Processor Code Generation. | J. Shu, Thomas Charles Wilson, Dilip K. Banerji |
| 1994 | ICCD | An ILP Solution for Simultaneous Scheduling, Allocation, and Binding in Multiple Block Synthesis. | Thomas Charles Wilson, Gary William Grewal, Dilip K. Banerji |
| 1993 | VLSID | An Integrated and Accelerated ILP Solution for Scheduling, Module Allocation, and Binding in Datapath Synthesis. | Thomas Charles Wilson, Nilanjan Mukherjee, Manoj K. Garg, Dilip K. Banerji |
| 1992 | VLSID | An Approach to Minimize Testability Overhead for BILBO based Built-In-Self-Test. | Anupam Basu, Thomas Charles Wilson, Dilip K. Banerji, Jayanti C. Majithia |
| 1983 | ARITH | Representation and processing of fractions in a residue system. | Dilip K. Banerji, Saroj Kaushik |
| 1975 | ARITH | On combinational logic for sign detection in residue number systems. | Dilip K. Banerji |
| 1972 | ARITH | "A novel implementation method for addition and subtraction in residue number systems". | Dilip K. Banerji |