| 2026 | VLSID | An Energy Efficient Pulse Accumulator Circuit (PAC) Based Multi-Bit Time Domain Compute in-Memory Architecture. | Subhradip Chakraborty, Dinesh Kushwaha |
| 2025 | ISCAS | A 1.91 POPS/W Energy-Efficient SRAM Based Signed Multi-Bit Time Domain CIM Architecture. | Subhradip Chakraborty, Dinesh Kushwaha, Himanshu Ranjan, Sudeb Dasgupta |
| 2024 | ISCAS | SRAM-Based Hybrid Analog Compute-In-memory Architecture to Enhance the Signal Margin. | Dinesh Kushwaha, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu |
| 2023 | VLSID | An Energy-Efficient Multi-bit Current-based Analog Compute-In-Memory Architecture and design Methodology. | Dinesh Kushwaha, Ashish Joshi, Neha Gupta, Aditya Sharma, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu |
| 2022 | ISCAS | A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing. | Dinesh Kushwaha, Aditya Sharma, Neha Gupta, Ritik Raj, Ashish Joshi, Jwalant Mishra, Rajat Kohli, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu |