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Doowon Lee

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

7

Active years

2013–2018

Best venue rank

A*

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2018ICCDLow-Overhead Microarchitectural Patching for Multicore Memory Subsystems.Doowon Lee, Opeoluwa Matthews, Valeria Bertacco
2017ASPDACAGARSoC: Automated test and coverage-model generation for verification of accelerator-rich SoCs.Biruk Mammo, Doowon Lee, Harrison Davis, Yijun Hou, Valeria Bertacco
2017ISCAMTraceCheck: Validating Non-Deterministic Behavior of Memory Consistency Models in Post-Silicon Validation.Doowon Lee, Valeria Bertacco
2016DACProbabilistic bug-masking analysis for post-silicon tests in microprocessor verification.Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco
2015MICRONoCVision: A Network-on-Chip Dynamic Visualization Solution.Vaibhav Gogte, Doowon Lee, Ritesh Parikh, Valeria Bertacco
2014DATEBrisk and limited-impact NoC routing reconfiguration.Doowon Lee, Ritesh Parikh, Valeria Bertacco
2013ICCADHybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms.Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco