Douglas Chang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
5
Active years
1994–1998
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1998 | DATE | Functional Scan Chain Testing. | Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-Sadowska, Mike Tien-Chien Lee |
| 1998 | FPGA | Partitioning Sequential Circuits on Dynamically Reconfiguable FPGAs. | Douglas Chang, Malgorzata Marek-Sadowska |
| 1997 | ASPDAC | Not necessarily more switches more routability [sic.]. | Yu-Liang Wu, Douglas Chang, Malgorzata Marek-Sadowska, Shuji Tsukiyama |
| 1997 | DAC | A Test Synthesis Approach to Reducing BALLAST DFT Overhead. | Douglas Chang, Mike Tien-Chien Lee, Malgorzata Marek-Sadowska, Takashi Aikyo, Kwang-Ting Cheng |
| 1997 | FPGA | Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs. | Douglas Chang, Malgorzata Marek-Sadowska |
| 1994 | ICCAD | On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution. | Yu-Liang Wu, Douglas Chang |