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Duvindu Piyasena

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

5

Active years

2018–2024

Best venue rank

B

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2024ISCASHardware Accelerator for Feature Matching with Binary Search Tree.Miyuru Thathsara, Siew-Kei Lam, Damith Kawshan, Duvindu Piyasena
2021FCCMEdge Accelerator for Lifelong Deep Learning using Streaming Linear Discriminant Analysis.Duvindu Piyasena, Siew-Kei Lam, Meiqing Wu
2021FPLAccelerating Continual Learning on Edge FPGA.Duvindu Piyasena, Siew-Kei Lam, Meiqing Wu
2020FPLDynamically Growing Neural Network Architecture for Lifelong Deep Learning on the Edge.Duvindu Piyasena, Miyuru Thathsara, Sathursan Kanagarajah, Siew Kei Lam, Meiqing Wu
2019FPLReducing Dynamic Power in Streaming CNN Hardware Accelerators by Exploiting Computational Redundancies.Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu
2019MMSPLowering Dynamic Power of a Stream-based CNN Hardware Accelerator.Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu
2018DSDA Novel Low-Complexity VLSI Architecture for an EEG Feature Extraction Platform.Dakila Serasinghe, Duvindu Piyasena, Ajith Pasqual