E. Kofi Vida-Torku
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
3
Active years
1982–1998
Best venue rank
A*
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1998 | ITC | Designing for scan test of high performance embedded memories. | E. Kofi Vida-Torku, George Joos |
| 1995 | DATE | Design and test of the PowerPC 603 microprocessor. | E. Kofi Vida-Torku, Charles H. Malley, Sung Park, R. Reed |
| 1994 | ITC | Balancing Structured and Ad-hoc Design for Test: Testing of the PowerPC 603 | Craig Hunter, E. Kofi Vida-Torku, Johnny J. LeBlanc |
| 1992 | ITC | Impact of Boundary Scan Design on Delay Test. | E. Kofi Vida-Torku |
| 1986 | ITC | Performance Assurance of Memories Embedded in VLSI Chips. | E. Kofi Vida-Torku, James A. Monzel, Charles E. Radke |
| 1983 | DAC | Petri Net based search directing heuristics for test generation. | E. Kofi Vida-Torku, Beverly Messick Huey |
| 1983 | DAC | Quality level and fault coverage for multichip modules. | E. Kofi Vida-Torku, Charles E. Radke |
| 1982 | ITC | Do Stuck Fault Models Reflect Manufacturing Defects? | C. C. Beh, K. H. Arya, Charles E. Radke, E. Kofi Vida-Torku |