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Edward J. Nowak

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

2

Active years

1996–2007

Best venue rank

National

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2007VLSIDA High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology.Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang
1996ISLPEDPractical performance/power alternatives within an existing CMOS technology generation.Kerry Bernstein, John E. Bertsch, William F. Clark, John J. Ellis-Monaghan, Larry G. Heller, Edward J. Nowak