Egino Sarto
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
1998–2006
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | ASPDAC | Constraint driven I/O planning and placement for chip-package co-design. | Jinjun Xiong, Yiu-Chung Wong, Egino Sarto, Lei He |
| 2006 | DAC | The importance of adopting a package-aware chip design flow. | Kaushik Sheth, Egino Sarto, Joel McGrath |
| 2000 | DAC | On switch factor based analysis of coupled | Andrew B. Kahng, Sudhakar Muddu, Egino Sarto |
| 1999 | VLSID | Interconnect Optimization Strategies for High-Performance VLSI Designs. | Andrew B. Kahng, Sudhakar Muddu, Egino Sarto |
| 1998 | DATE | Interconnect Tuning Strategies for High-Performance Ics. | Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahul Sharma |