| 2013 | DATE | Stochastic degradation modeling and simulation for analog integrated circuits in nanometer CMOS. | Georges G. E. Gielen, Elie Maricau |
| 2012 | DATE | Advances in variation-aware modeling, verification, and testing of analog ICs. | Dimitri de Jonghe, Elie Maricau, Georges G. E. Gielen, Trent McConaghy, Bratislav Tasic, Haralampos-G. D. Stratigopoulos |
| 2012 | DATE | Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection. | Elie Maricau, Dimitri de Jonghe, Georges G. E. Gielen |
| 2011 | DATE | Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation. | Georges G. E. Gielen, Elie Maricau, Pieter De Wit |
| 2011 | DATE | Stochastic circuit reliability analysis. | Elie Maricau, Georges G. E. Gielen |
| 2010 | DATE | Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity. | Elie Maricau, Georges G. E. Gielen |
| 2010 | ICCAD | Design automation towards reliable analog integrated circuits. | Georges G. E. Gielen, Elie Maricau, Pieter De Wit |
| 2009 | DATE | Efficient reliability simulation of analog ICs including variability and time-varying stress. | Elie Maricau, Georges G. E. Gielen |
| 2009 | IOLTS | Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?. | Abhijit Chatterjee, Jacob A. Abraham, Adit D. Singh, Elie Maricau, Rakesh Kumar, Christos A. Papachristou |
| 2009 | IOLTS | A methodology for measuring transistor ageing effects towards accurate reliability simulation. | Elie Maricau, Georges G. E. Gielen |
| 2008 | DATE | Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies. | Georges G. E. Gielen, Pieter De Wit, Elie Maricau, Johan Loeckx, Javier Martn-Martnez, Ben Kaczer, Guido Groeseneken, Rosana Rodrguez, Montserrat Nafra |