| 2017 | ISPASS | HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation. | Rakesh Kumar, Jos Cano, Aleksandar Brankovic, Demos Pavlou, Kyriakos Stavrou, Enric Gibert, Alejandro Martnez, Antonio Gonzalez |
| 2014 | ASPLOS | Speculative hardware/software co-designed floating-point multiply-add fusion. | Marc Lupon, Enric Gibert, Grigorios Magklis, Sridhar Samudrala, Ral Martnez, Kyriakos Stavrou, David R. Ditzel |
| 2014 | CGO | Warm-Up Simulation Methodology for HW/SW Co-Designed Processors. | Aleksandar Brankovic, Kyriakos Stavrou, Enric Gibert, Antonio Gonzlez |
| 2012 | VEE | DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support. | Demos Pavlou, Enric Gibert, Fernando Latorre, Antonio Gonzlez |
| 2009 | ISCA | Boosting single-thread performance in multi-core systems through fine-grain multi-threading. | Carlos Madriles, Pedro Lpez, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martnez, Ral Martnez, Antonio Gonzlez |
| 2003 | CGO | Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache. | Enric Gibert, F. Jess Snchez, Antonio Gonzlez |
| 2003 | MICRO | Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors. | Enric Gibert, F. Jess Snchez, Antonio Gonzlez |
| 2002 | ICS | An interleaved cache clustered VLIW processor. | Enric Gibert, F. Jess Snchez, Antonio Gonzlez |
| 2002 | MICRO | Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor. | Enric Gibert, F. Jess Snchez, Antonio Gonzlez |