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Enrique San Milln

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

13

Venues

5

Active years

1999–2014

Best venue rank

C

Where they publish

Papers

13 indexed papers, newest first.

YearVenueTitleAuthors
2014IOLTSEffect of ionizing radiation on TRNGs for safe telecommunications: Robustness and randomness.Honorio Martn, Anna Vaskova, Celia Lpez-Ongil, Enrique San Milln, Marta Portela-Garca
2011IOLTSAKARI-X: A pseudorandom number generator for secure lightweight systems.Honorio Martn, Enrique San Milln, Luis Entrena, Julio Csar Hernndez Castro, Pedro Peris-Lopez
2011IOLTSAccelerating secure circuit design with hardware implementation of Diehard Battery of tests of randomness.Anna Vaskova, Celia Lpez-Ongil, Enrique San Milln, Alejandro Jimnez-Horas, Luis Entrena
2010IOLTSRobust cryptographic ciphers with on-line statistical properties validation.Anna Vaskova, Celia Lpez-Ongil, Alejandro Jimnez-Horas, Enrique San Milln, Luis Entrena
2009IOLTSPseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers.Alejandro Jimnez-Horas, Enrique San Milln, Celia Lpez-Ongil, Marta Portela-Garca, Mario Garca-Valderas, Luis Entrena
2008DSDLogic Transformations by Multiple Wire Network Addition.Enrique San Milln, Luis Entrena, Jos Alberto Espejo
2008IOLTSSmart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard.Celia Lpez-Ongil, Alejandro Jimnez-Horas, Marta Portela-Garca, Mario Garca-Valderas, Enrique San Milln, Luis Entrena
2001ASPDACFunctional extension of structural logic optimization techniques.Jos Alberto Espejo, Luis Entrena, Enrique San Milln, Emilio Olas
2001DATEGeneralized reasoning scheme for redundancy addition and removal logic optimization.Jos Alberto Espejo, Luis Entrena, Enrique San Milln, Emilio Olas
2001DSDOn the Optimization Power of Redundancy Addition and Removal for Sequential Logic Optimization.Enrique San Milln, Luis Entrena, Jos Alberto Espejo
2001ICCADOn the Optimization Power of Redundancy Addition and Removal Techniques for Sequential Circuits.Enrique San Milln, Luis Entrena, Jos Alberto Espejo
2001IOLTSLogic Optimization of Unidirectional Circuits with Structural Methods.Luis Entrena, Celia Lpez, Emilio Olas, Enrique San Milln, Jos Alberto Espejo
1999DATEIntegrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization.Enrique San Milln, Luis Entrena, Jos Alberto Espejo, Silvia Chiusano, Fulvio Corno