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Eric Naviasky

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2003–2017

Best venue rank

A*

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2017ISCASMulti-standard low-power DDR I/O circuit design in 7nm CMOS process.Moo Sung Chae, Tom Wilson, Eric Naviasky
2006DACTomorrow's analog: just dead or just different?Shekhar Borkar, Robert W. Brodersen, Jue-Hsien Chern, Eric Naviasky, D. Saias, Charles G. Sodini
2003ISCASContinuous-time, frequency translating, bandpass delta-sigma modulator.Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon