| 2018 | HPCA | HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness. | Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu |
| 2018 | SIGMETRICS | Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation. | Yixin Luo, Saugata Ghose, Yu Cai, Erich F. Haratsch, Onur Mutlu |
| 2017 | HPCA | Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques. | Yu Cai, Saugata Ghose, Yixin Luo, Ken Mai, Onur Mutlu, Erich F. Haratsch |
| 2017 | ITA | Correcting errors by natural redundancy. | Anxiao Jiang, Pulakesh Upadhyaya, Erich F. Haratsch, Jehoshua Bruck |
| 2017 | ITW | Syndrome-coupled rate-compatible error-correcting codes. | Pengfei Huang, Yi Liu, Xiaojie Zhang, Paul H. Siegel, Erich F. Haratsch |
| 2015 | HPCA | Data retention in MLC NAND flash memory: Characterization, optimization, and recovery. | Yu Cai, Yixin Luo, Erich F. Haratsch, Ken Mai, Onur Mutlu |
| 2015 | ISIT | Write process modeling in MLC flash memories using renewal theory. | Meysam Asadi, Erich F. Haratsch, Aleksandar Kavcic, Narayana P. Santhanam |
| 2014 | ISIT | Noise modeling and capacity analysis for NAND flash memories. | Qing Li, Anxiao Jiang, Erich F. Haratsch |
| 2014 | SIGMETRICS | Neighbor-cell assisted error correction for MLC NAND flash memories. | Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Osman S. Unsal, Adrin Cristal, Ken Mai |
| 2013 | DATE | Threshold voltage distribution in MLC NAND flash memory: characterization, analysis, and modeling. | Yu Cai, Erich F. Haratsch, Onur Mutlu, Ken Mai |
| 2013 | ICCD | Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation. | Yu Cai, Onur Mutlu, Erich F. Haratsch, Ken Mai |
| 2012 | DATE | Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis. | Yu Cai, Erich F. Haratsch, Onur Mutlu, Ken Mai |
| 2012 | ICCD | Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime. | Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Adrin Cristal, Osman S. nsal, Ken Mai |
| 2011 | FCCM | FPGA-Based Solid-State Drive Prototyping Platform. | Yu Cai, Erich F. Haratsch, Mark P. McCartney, Ken Mai |
| 2011 | FPGA | FPGA-based nand flash memory error characterization and solid-state drive prototyping platform (abstract only). | Yu Cai, Erich F. Haratsch, Mark P. McCartney, Mudit Bhargava, Ken Mai |
| 2007 | GLOBECOM | A Bit-Node Centric Architecture for Low-Density Parity-Check Decoders. | Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon Wei |
| 2007 | ICCCN | Serial Sum-Product Architecture for Low-Density Parity-Check Codes. | Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon Wei |
| 2006 | ISCAS | High-rate quasi-cyclic LDPC codes for magnetic recording channel with low error floor. | Hao Zhong, Tong Zhang, Erich F. Haratsch |
| 2000 | GLOBECOM | Pipelined reduced-state sequence estimation. | Erich F. Haratsch, Kamran Azadet |
| 2000 | ISCAS | High-speed reduced-state sequence estimation. | Erich F. Haratsch, Kamran Azadet |