| 1990 | ICCAD | Exploitation of Periodicity in Logic Simulation of Synchronous Circuits. | Rahul Razdan, Gabriel P. Bischoff, Ernst G. Ulrich |
| 1988 | ITC | Experiences with Concurrent Fault Simulation of Diagnostic Programs. | Stephen R. Demba, Ernst G. Ulrich, Karen Panetta, David Giramma |
| 1988 | ITC | Switch-Level Concurrent Fault Simulation Based on a General Purpose List Traversal Mechanism. | Deborah Machlin, David Gross, Sudhir Kadkade, Ernst G. Ulrich |
| 1985 | ITC | Concurrent Simulation at the Switch, Gate, and Register Levels. | Ernst G. Ulrich |
| 1983 | DAC | A design verification methodology based on concurrent simulation and clock suppression. | Ernst G. Ulrich |
| 1982 | DAC | Speed and accuracy in digital network simulation based on structural modeling. | Ernst G. Ulrich, Dennis Hebert |
| 1980 | DAC | Table lookup techniques for fast and flexible digital logic simulation. | Ernst G. Ulrich |
| 1980 | DAC | High-speed concurrent fault simulation with vectors and scalars. | Ernst G. Ulrich, D. Lacy, N. Phillips, J. Tellier, M. Kearney, T. Elkind, R. Beaven |
| 1975 | DAC | Random test generation using concurrent logic simulation. | Donald M. Schuler, Ernst G. Ulrich, Thomas E. Baker, Susan P. Bryant |
| 1973 | DAC | The concurrent simulation of nearly identical digital networks. | Ernst G. Ulrich, Thomas E. Baker |
| 1972 | DAC | Clustering and linear placement. | Donald M. Schuler, Ernst G. Ulrich |
| 1972 | DAC | Fault-test analysis techniques based on logic simulation. | Ernst G. Ulrich, Thomas E. Baker, L. R. Williams |