Eugenio Villar
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
42
Venues
11
Active years
1995–2021
Best venue rank
A*
Where they publish
Papers
42 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | FDL | Modeling and Performance Estimation of Robotic Systems using ROS: Application to drone-based Services. | Javier Merino, Raul Gomez, Hector Posadas, Eugenio Villar |
| 2020 | DSD | Key Enabling Technologies for Drones. | Mahmoud Hussein, Rda Nouacer, Yassine Ouhammou, Eugenio Villar, Federico Corradi, Carlo Tieri, Rodrigo Castieira |
| 2020 | DSD | Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow. | Vittoriano Muttillo, Giacomo Valente, Luigi Pomante, Hector Posadas, Javier Merino, Eugenio Villar |
| 2017 | DSD | Static Write Buffer Cache Modeling to Increase Host-Compiled Simulation Accuracy. | Hector Posadas, Luis Diaz, Eugenio Villar |
| 2016 | DSD | CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties. | Ralph Grgen, Kim Grttner, Fernando Herrera, Pablo Peil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Ral Valencia, Ingo Sander, Kathrin Rosvall, Davide Quaglia |
| 2015 | FDL | Enhancing analysability and time predictability in UML/MARTE component-based application models. | Fernando Herrera, Pablo Peil, Eugenio Villar |
| 2015 | SCOPES | A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems. | Fernando Herrera, Pablo Peil, Eugenio Villar |
| 2014 | DSD | Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse. | Alejandro Nicols, Pablo Peil, Hctor Posadas, Eugenio Villar |
| 2013 | DSD | Early Performance Evaluation of Multi-OS Embedded Platforms Using Native Simulation. | Rodrigo Fernndez, Hector Posadas, Eugenio Villar |
| 2013 | DSD | EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications. | Hector Posadas, Eugenio Villar, Florian Broekaert, Michel Bourdells, Albert Cohen, Antoniu Pop, Nhat Minh L, Adrien Guatto, Mihai T. Lazarescu, Luciano Lavagno, Andrei Sergeevich Terechko, Miguel Glassee, Daniel Calvo, Eduardo de las Heras |
| 2012 | DCAI | Evaluation of High Performance Clusters in Private Cloud Computing Environments. | Julio Gmez Lpez, Eugenio Villar, Gabriel Molero, Alejandro Cama-Pinto |
| 2012 | DSD | COMPLEX: COdesign and Power Management in PLatform-Based Design Space EXploration. | Kim Grttner, Philipp A. Hartmann, Kai Hylla, Sven Rosinger, Wolfgang Nebel, Fernando Herrera, Eugenio Villar, Carlo Brandolese, William Fornaciari, Gianluca Palermo, Chantal Ykman-Couvreur, Davide Quaglia, Francisco Ferrero, Ral Valencia |
| 2012 | DSD | Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE. | Fernando Herrera, Hector Posadas, Eugenio Villar, Daniel Calvo |
| 2012 | FDL | A model-driven methodology for the development of SystemC executable environments. | Fernando Herrera, Pablo Peil, Hector Posadas, Eugenio Villar |
| 2012 | FDL | Model-Driven Methodology for the Development of Multi-level Executable Environments. | Fernando Herrera, Pablo Peil, Hector Posadas, Eugenio Villar |
| 2012 | MODELS | Automatic synthesis from UML/MARTE models using channel semantics. | Pablo Peil, Hctor Posadas, Alejandro Nicols, Eugenio Villar |
| 2011 | ASPDAC | Fast data-cache modeling for native co-simulation. | Hector Posadas, Luis Diaz, Eugenio Villar |
| 2011 | FDL | A framework for the generation from UML/MARTE models of IPXACT HW platform descriptions for multi-level performance estimation. | Fernando Herrera, Eugenio Villar |
| 2011 | FDL | Systemc refinement of abstract adaptive processes for implementation into Dynamically Reconfigurable Hardware. | Fernando Herrera, Eugenio Villar, Philipp A. Hartmann |
| 2010 | FDL | Formal Foundations for MARTE-SystemC Interoperability. | Pablo Peil, Fernando Herrera, Eugenio Villar |
| 2010 | FDL | Formal Support for Untimed SystemC Specifications: Application to High-level Synthesis. | Eugenio Villar, Fernando Herrera, Vctor Fernndez |
| 2010 | ICECCS | Formal Modeling for UML/MARTE Concurrency Resources. | Pablo Peil, Hector Posadas, Eugenio Villar |
| 2010 | ICECCS | AADS+: AADL Simulation Including the Behavioral Annex. | Roberto Varona-Gomez, Eugenio Villar |
| 2010 | ISORC | Early Modeling of Linux-Based RTOS Platforms in a SystemC Time-Approximate Co-simulation Environment. | Hector Posadas, Eugenio Villar, Dominique Ragot, Marcos Martnez |
| 2009 | FDL | Local application of simulation directed for Exhaustive Coverage of Schedulings of SystemC specifications. | Fernando Herrera, Eugenio Villar |
| 2009 | ICECCS | AADL Simulation and Performance Analysis in SystemC. | Roberto Varona-Gomez, Eugenio Villar |
| 2008 | DATE | Heterogeneous System-level Specification Using SystemC. | Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel |
| 2008 | FDL | Specification of Adaptive HW/SW Systems in SystemC. | Fernando Herrera, Eugenio Villar, Philipp A. Hartmann |
| 2007 | FDL | A general approach to the interoperability of HetSC and SystemC-AMS. | Fernando Herrera, Eugenio Villar, Christoph Grimm, Markus Damm, Jan Haase |
| 2007 | FDL | Protocol Bus Modeling using inheritance with TLM2.0. | Hector Posadas, David Quijano, Eugenio Villar, Marcos Martnez |
| 2007 | FPL | The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems. | Andreas Herrholz, Frank Oppenheimer, Philipp A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Jan Haase, Florian Brame, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, Marcos Martnez |
| 2006 | ASPDAC | POSIX modeling in SystemC. | Hector Posadas, Jess damez, Pablo Snchez, Eugenio Villar, Francisco Blasco |
| 2006 | DAC | A framework for embedded system specification under different models of computation in SystemC. | Fernando Herrera, Eugenio Villar |
| 2006 | FDL | Extension of the SystemC Kernel for Simulation Coverage. | Fernando Herrera, Eugenio Villar |
| 2005 | FDL | Mixing Synchronous Reactive and Untimed Models of Computation. | Fernando Herrera, Eugenio Villar |
| 2004 | DATE | System-Level Performance Analysis in SystemC. | Hector Posadas, Fernando Herrera, Pablo Snchez, Eugenio Villar, Francisco Blasco |
| 2004 | FDL | Heterogeneous System-Level Specification in SystemC. | Fernando Herrera, Pablo Snchez, Eugenio Villar |
| 2003 | DATE | Systemic Embedded Software Generation from SystemC. | Fernando Herrera, Hector Posadas, Pablo Snchez, Eugenio Villar |
| 2003 | FDL | Modeling of CSP, KPN and SR Systems with SystemC. | Fernando Herrera, Pablo Snchez, Eugenio Villar |
| 2001 | DATE | C/C++: progress or deadlock in system-level specification. | Daniel Gajski, Eugenio Villar, Wolfgang Rosenstiel, Vassilios Gerousis, D. Barton, Jonas Plantin, S. E. Ericsson, Patrizia Cavalloro, Gjalt G. de Jong |
| 1995 | ASPDAC | Future direction of synthesizability and interoperability of HDL's: part 1. | Masaharu Imai, Eugenio Villar |
| 1995 | ASPDAC | Future direction of synthesizabilty and interoperability of HDL's: part 2. | Eugenio Villar, Masaharu Imai |