Foong-Charn Chang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1988–1999
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | DATE | Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. | Lun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano |
| 1988 | DAC | An Accurate and Efficient Gate Level Delay Calculator for MOS Circuits. | Foong-Charn Chang, Chin-Fu Chen, Prasad Subramaniam |