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Francisco Gilabert Villamn

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

6

Active years

2006–2010

Best venue rank

A*

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2010ICCADDesign space exploration and performance evaluation at Electronic System Level for NoC-based MPSoC.Sren Sonntag, Francisco Gilabert Villamn
2010MICROContrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology.Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Francisco Gilabert Villamn, Mara Engracia Gmez, Davide Bertozzi
2009CISISDesigning Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints.Francisco Gilabert Villamn, Daniele Ludovici, Simone Medardoni, Davide Bertozzi, Luca Benini, Georgi Nedeltchev Gaydadjiev
2009DATEAssessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints.Daniele Ludovici, Francisco Gilabert Villamn, Simone Medardoni, Crispn Gmez Requena, Mara Engracia Gmez, Pedro Lpez, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi
2008ICPADSRUFT: Simplifying the Fat-Tree Topology.Crispn Gmez Requena, Francisco Gilabert Villamn, Mara Engracia Gmez, Pedro Juan Lpez Rodrguez, Jos Duato
2006EuroParOn the Influence of the Selection Function on the Performance of Fat-Trees.Francisco Gilabert Villamn, Mara Engracia Gmez, Pedro Lpez, Jos Duato