Franois-Raymond Boyer
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
2018–2019
Best venue rank
National
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | FCCM | Module-per-Object: A Human-Driven Methodology for C++-Based High-Level Synthesis Design. | Jeferson Santiago da Silva, Franois-Raymond Boyer, J. M. Pierre Langlois |
| 2018 | FPGA | P4-Compatible High-Level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs. | Jeferson Santiago da Silva, Franois-Raymond Boyer, J. M. Pierre Langlois |
| 2018 | ISCAS | Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis. | Imad Benacer, Franois-Raymond Boyer, Yvon Savaria |
| 2018 | NetSoft | Extern Objects in P4: an ROHC Header Compression Scheme Case Study. | Jeferson Santiago da Silva, Franois-Raymond Boyer, Laurent-Olivier Chiquette, J. M. Pierre Langlois |