Franois Stas
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2014–2017
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | ISCAS | Integration of level shifting in a TSPC flip-flop for low-power robust timing closure in dual-Vdd ULV circuits. | Franois Stas, David Bol |
| 2017 | ISCAS | A 0.4V 0.08fJ/cycle retentive True-Single-Phase-Clock 18T Flip-Flop in 28nm FDSOI CMOS. | Franois Stas, David Bol |
| 2014 | ISCAS | Bellevue: A 50MHz variable-width SIMD 32bit microcontroller at 0.37V for processing-intensive wireless sensor nodes. | Franois Botman, Julien De Vos, Sebastien Bernard, Franois Stas, Jean-Didier Legat, David Bol |