Geeta Patil
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2015–2017
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | VLSID | DTLB: Deterministic TLB for Tightly Bound Hard Real-Time Systems. | Kajal Varma, Geeta Patil, Biju K. Raveendran |
| 2015 | VLSID | Way Halted Prediction Cache: An Energy Efficient Cache Architecture for Embedded Processors. | Neethu Bal Mallya, Geeta Patil, Biju K. Raveendran |