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George Michelogiannakis

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

24

Venues

13

Active years

2009–2026

Best venue rank

A*

Where they publish

Papers

24 indexed papers, newest first.

YearVenueTitleAuthors
2026ISPASSHibiscus: End-to-end Architectural Simulation Framework for Hybrid SFQ/CMOS-Memory Compute Systems.Ryan Marsala, Yerzhan Mustafa, Prabhath Tangella, Mohammad Sonji, George Michelogiannakis, Seluk Kse, Adwait Jog, Mehmet E. Belviranli
2025ISCASEnabling Classical-Quantum Interface Using Digital SFQ for Pulse-Phase Driven Control for Superconducting Qubits.Meriam Gay Bautista-Jurney, Patricia Gonzalez-Guerrero, George Michelogiannakis, Anastasiia Butko
2024CLUSTERJob Scheduling in High Performance Computing Systems with Disaggregated Memory Resources.Jie Li, George Michelogiannakis, Samuel A. Maloney, Brandon Cook, Estela Suarez, John Shalf, Yong Chen
2023CLUSTEREfficient Intra-Rack Resource Disaggregation for HPC Using Co-Packaged DWDM Photonics.George Michelogiannakis, Yehia Arafa, Brandon Cook, Liang Yuan Dai, Abdel-Hameed A. Badawy, Madeleine Glick, Yuyang Wang, Keren Bergman, John Shalf
2023ICCADReliable Hyperdimensional Reasoning on Unreliable Emerging Technologies.Hamza Errahmouni Barkam, Sanggeon Yun, Hanning Chen, Paul Gensler, Albi Mema, Andrew Ding, George Michelogiannakis, Hussam Amrouch, Mohsen Imani
2022ASPLOSTemporal and SFQ pulse-streams encoding for area-efficient superconducting accelerators.Patricia Gonzalez-Guerrero, Meriam Gay Bautista, Darren Lyles, George Michelogiannakis
2020ASPLOSA Computational Temporal Logic for Superconducting Accelerators.Georgios Tzimpragos, Dilip Vasudevan, Nestan Tsiskaridze, George Michelogiannakis, Advait Madhavan, Jennifer Volk, John Shalf, Timothy Sherwood
2020SCTAGO: rethinking routing design in high performance reconfigurable networks.Min Yee Teh, Yu-Han Hung, George Michelogiannakis, Shijia Yan, Madeleine Glick, John Shalf, Keren Bergman
2019ICCDSpecLock: Speculative Lock Forwarding.Pooria M. Yaghini, George Michelogiannakis, Paul V. Gratz
2019ISPASSPARADISE - Post-Moore Architecture and Accelerator Design Space Exploration Using Device Level Simulation and Experiments.Dilip P. Vasudevan, George Michelogiannakis, David Donofrio, John Shalf
2019SCBandwidth steering in HPC using silicon nanophotonics.George Michelogiannakis, Yiwen Shen, Min Yee Teh, Xiang Meng, Benjamin Aivazi, Taylor L. Groves, John Shalf, Madeleine Glick, Manya Ghobadi, Larry Dennison, Keren Bergman
2017CCGRIDAPHiD: Hierarchical Task Placement to Enable a Tapered Fat Tree Topology for Lower Power and Cost in HPC Networks.George Michelogiannakis, Khaled Z. Ibrahim, John Shalf, Jeremiah J. Wilke, Samuel Knight, Joseph P. Kenny
2017HiPCLast Level Collective Hardware Prefetching For Data-Parallel Applications.George Michelogiannakis, John Shalf
2016ISPASSOpenSoC Fabric: On-chip network generator.Farzad Fatollahi-Fard, David Donofrio, George Michelogiannakis, John Shalf
2014ICSCollective memory transfers for multi-core chips.George Michelogiannakis, Alexander Williams, Samuel Williams, John Shalf
2014MICROOpenSoC Fabric: On-Chip Network Generator: Using Chisel to Generate a Parameterizable On-Chip Interconnect Fabric.Farzad Fatollahi-Fard, David Donofrio, George Michelogiannakis, John Shalf
2013ISPASSA detailed and flexible cycle-accurate Network-on-Chip simulator.Nan Jiang, Daniel U. Becker, George Michelogiannakis, James D. Balfour, Brian Towles, David E. Shaw, John Kim, William J. Dally
2013SCChannel reservation protocol for over-subscribed channels and destinations.George Michelogiannakis, Nan Jiang, Daniel Becker, William J. Dally
2013SBAC-PADExtending Summation Precision for Network Reduction Operations.George Michelogiannakis, Xiaoye S. Li, David H. Bailey, John Shalf
2012HPCANetwork congestion avoidance through Speculative Reservation.Nan Jiang, Daniel U. Becker, George Michelogiannakis, William J. Dally
2012ICCDAdaptive Backpressure: Efficient buffer management for on-chip networks.Daniel U. Becker, Nan Jiang, George Michelogiannakis, William J. Dally
2011MICROPacket chaining: efficient single-cycle allocation for on-chip networks.George Michelogiannakis, Nan Jiang, Daniel Becker, William J. Dally
2009HPCAElastic-buffer flow control for on-chip networks.George Michelogiannakis, James D. Balfour, William J. Dally
2009SCRouter designs for elastic buffer on-chip networks.George Michelogiannakis, William J. Dally