Gin Yee
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
1996–2000
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | DATE | Delay Minimization and Technology Mapping of Two-Level Structures and Implementation Using Clock-Delayed Domino Logic. | Jovanka Ciric, Gin Yee, Carl Sechen |
| 2000 | ICCD | Output Prediction Logic: A High-Performance CMOS Design Technique. | Larry McMurchie, Su Kio, Gin Yee, Tyler Thorp, Carl Sechen |
| 1999 | ICCD | Design and Synthesis of Monotonic Circuits. | Tyler Thorp, Gin Yee, Carl Sechen |
| 1998 | ICCAD | Domino logic synthesis using complex static gates. | Tyler Thorp, Gin Yee, Carl Sechen |
| 1996 | ICCD | Clock-Delayed Domino for Adder and Combinational Logic Desig. | Gin Yee, Carl Sechen |