Gnanasekaran Swaminathan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1990–1993
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1993 | VTS | Combinational circuit ATPG using binary decision diagrams. | Sanjay Srinivasan, Gnanasekaran Swaminathan, James H. Aylor, M. Ray Mercer |
| 1990 | ICCD | Concurrent testing of VLSI circuits using conservative logic. | Gnanasekaran Swaminathan, James H. Aylor, Barry W. Johnson |