| 2005 | ITC | Testing high-speed, large scale implementation of SerDes I/Os on chips used in throughput computing systems. | Iain Robertson, Graham Hetherington, Tom Leslie, Ishwar Parulkar, Ronald Lesnikoski |
| 2004 | ITC | Minimizing Power Consumption in Scan Testing: Pattern Generation and DFT Techniques. | Kenneth M. Butler, Jayashree Saxena, Tony Fryars, Graham Hetherington |
| 2004 | ITC | A Holistic Parallel and Hierarchical Approach towards Design-For-Test. | C. P. Ravikumar, Graham Hetherington |
| 2003 | ITC | Circular BIST testing the digital logic within a high speed Serdes. | Graham Hetherington, Richard Simpson |
| 1999 | ITC | Logic BIST for large industrial designs: real issues and case studies. | Graham Hetherington, Tony Fryars, Nagesh Tamarapalli, Mark Kassab, Abu S. M. Hassan, Janusz Rajski |
| 1995 | ITC | Test Generation and Design for Test for a Large Multiprocessing DSP. | Graham Hetherington, Greg Sutton, Kenneth M. Butler, Theo J. Powell |
| 1990 | DAC | High-Level Synthesis: Technology Transfer to Industry. | Robin C. Sarma, Mark D. Dooley, N. Craig Newman, Graham Hetherington |