| 2021 | MICRO | Fat Loads: Exploiting Locality Amongst Contemporaneous Load Operations to Optimize Cache Accesses. | Vanshika Baoni, Adarsh Mittal, Gurindar S. Sohi |
| 2018 | ASPLOS | Filtering Translation Bandwidth with Virtual Caching. | Hongil Yoon, Jason Lowe-Power, Gurindar S. Sohi |
| 2016 | HPCA | Revisiting virtual L1 caches: A practical design using dynamic synonym remapping. | Hongil Yoon, Gurindar S. Sohi |
| 2014 | ICS | Author retrospective for cooperative cache partitioning for chip multiprocessors. | Jichuan Chang, Gurindar S. Sohi |
| 2014 | PLDI | Globally precise-restartable execution of parallel programs. | Gagan Gupta, Srinath Sridharan, Gurindar S. Sohi |
| 2014 | PLDI | Adaptive, efficient, parallel execution of parallel programs. | Srinath Sridharan, Gagan Gupta, Gurindar S. Sohi |
| 2013 | ICS | Holistic run-time parallelism management for time and energy efficiency. | Srinath Sridharan, Gagan Gupta, Gurindar S. Sohi |
| 2011 | MICRO | Dataflow execution of sequential imperative programs on multicore architectures. | Gagan Gupta, Gurindar S. Sohi |
| 2009 | ASPLOS | Mixed-mode multicore reliability. | Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi |
| 2009 | PPoPP | Serialization sets: a dynamic dependence-based parallel execution model. | Matthew D. Allen, Srinath Sridharan, Gurindar S. Sohi |
| 2008 | ASPLOS | Adapting to intermittent faults in multicore systems. | Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi |
| 2008 | HPCA | Serializing instructions in system-intensive workloads: Amdahl's Law strikes again. | Philip M. Wells, Gurindar S. Sohi |
| 2007 | ICS | Cooperative cache partitioning for chip multiprocessors. | Jichuan Chang, Gurindar S. Sohi |
| 2006 | ASPLOS | Computation spreading: employing hardware migration to specialize CMP cores on-the-fly. | Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi |
| 2006 | ISCA | Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs. | Saisanthosh Balakrishnan, Gurindar S. Sohi |
| 2006 | ISCA | Cooperative Caching for Chip Multiprocessors. | Jichuan Chang, Gurindar S. Sohi |
| 2004 | ASPLOS | Coherence decoupling: making use of incoherence. | Jaehyuk Huh, Jichuan Chang, Doug Burger, Gurindar S. Sohi |
| 2004 | ISCA | Use-Based Register Caching with Decoupled Indexing. | J. Adam Butts, Gurindar S. Sohi |
| 2004 | MICRO | Single-Chip Multiprocessors: The Next Wave of Computer Architecture Innovation. | Gurindar S. Sohi |
| 2003 | ISCA | Parallelism in the Front-End. | Paramjit S. Oberoi, Gurindar S. Sohi |
| 2003 | MICRO | Exploiting Value Locality in Physical Register Files. | Saisanthosh Balakrishnan, Gurindar S. Sohi |
| 2002 | ASPLOS | Dynamic dead-instruction detection and elimination. | J. Adam Butts, Gurindar S. Sohi |
| 2002 | ICPP | Out-of-Order Instruction Fetch Using Multiple Sequencers. | Paramjit S. Oberoi, Gurindar S. Sohi |
| 2002 | MICRO | Characterizing and predicting value degree of use. | J. Adam Butts, Gurindar S. Sohi |
| 2002 | MICRO | A quantitative framework for automated pre-execution thread selection. | Amir Roth, Gurindar S. Sohi |
| 2002 | MICRO | Master/slave speculative parallelization. | Craig B. Zilles, Gurindar S. Sohi |
| 2001 | HPCA | Speculative Data-Driven Multithreading. | Amir Roth, Gurindar S. Sohi |
| 2001 | HPCA | A Programmable Co-Processor for Profiling. | Craig B. Zilles, Gurindar S. Sohi |
| 2001 | ISCA | Execution-based prediction using speculative slices. | Craig B. Zilles, Gurindar S. Sohi |
| 2000 | HiPC | Amir Roth: Speculative Multithreaded Processors. | Gurindar S. Sohi |
| 2000 | HPCA | Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors. | Andreas Moshovos, Gurindar S. Sohi |
| 2000 | ISCA | Understanding the backward slices of performance degrading instructions. | Craig B. Zilles, Gurindar S. Sohi |
| 2000 | MICRO | A static power model for architects. | J. Adam Butts, Gurindar S. Sohi |
| 2000 | MICRO | Register integration: a simple and efficient implementation of squash reuse. | Amir Roth, Gurindar S. Sohi |
| 1999 | ISCA | Effective Jump-Pointer Prefetching for Linked Data Structures. | Amir Roth, Gurindar S. Sohi |
| 1999 | ICS | Improving virtual function call target prediction via dependence-based pre-computation. | Amir Roth, Andreas Moshovos, Gurindar S. Sohi |
| 1999 | MICRO | Read-After-Read Memory Dependence Prediction. | Andreas Moshovos, Gurindar S. Sohi |
| 1999 | MICRO | The Use of Multithreading for Exception Handling. | Craig B. Zilles, Joel S. Emer, Gurindar S. Sohi |
| 1998 | ASPLOS | Dependance Based Prefetching for Linked Data Structures. | Amir Roth, Andreas Moshovos, Gurindar S. Sohi |
| 1998 | ASPLOS | An Empirical Analysis of Instruction Repetition. | Avinash Sodani, Gurindar S. Sohi |
| 1998 | HPCA | Speculative Versioning Cache. | Sridhar Gopal, T. N. Vijaykumar, James E. Smith, Gurindar S. Sohi |
| 1998 | ISCA | Retrospective: Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors. | Gurindar S. Sohi |
| 1998 | ISCA | Retrospective: Multiscalar Processors. | Gurindar S. Sohi |
| 1998 | ISCA | Multiscalar Processors. | Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar |
| 1998 | ISCA | Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors. | Gurindar S. Sohi, Sriram Vajapeyam |
| 1998 | MICRO | Understanding the Differences Between Value Prediction and Instruction Reuse. | Avinash Sodani, Gurindar S. Sohi |
| 1998 | MICRO | Task Selection for a Multiscalar Processor. | T. N. Vijaykumar, Gurindar S. Sohi |
| 1997 | ISCA | Dynamic Speculation and Synchronization of Data Dependences. | Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi |
| 1997 | ISCA | Dynamic Instruction Reuse. | Avinash Sodani, Gurindar S. Sohi |
| 1997 | MICRO | Streamlining Inter-Operation Memory Communication via Data Dependence Prediction. | Andreas Moshovos, Gurindar S. Sohi |
| 1996 | ISCA | High-Bandwidth Address Translation for Multiple-Issue Processors. | Todd M. Austin, Gurindar S. Sohi |
| 1995 | ISCA | Streamlining Data Cache Access with Fast Address Calculation. | Todd M. Austin, Dionisios N. Pnevmatikatos, Gurindar S. Sohi |
| 1995 | ISCA | Multiscalar Processors. | Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar |
| 1995 | MICRO | Zero-cycle loads: microarchitecture support for reducing load latency. | Todd M. Austin, Gurindar S. Sohi |
| 1994 | ISCA | Guarded Executing and Branch Prediction in Dynamic ILP Processors. | Dionisios N. Pnevmatikatos, Gurindar S. Sohi |
| 1994 | MICRO | The anatomy of the register file in a multiscalar processor. | Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi |
| 1994 | PLDI | Efficient Detection of All Pointer and Array Access Errors. | Todd M. Austin, Scott E. Breach, Gurindar S. Sohi |
| 1993 | MICRO | Control flow prediction for dynamic ILP processors. | Dionisios N. Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi |
| 1992 | ISCA | Dynamic Dependency Analysis of Ordinary Programs. | Todd M. Austin, Gurindar S. Sohi |
| 1992 | ISCA | The Expandable Split Window Paradigm for Exploiting Fine-Grain Parallelism. | Manoj Franklin, Gurindar S. Sohi |
| 1992 | MICRO | Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors. | Manoj Franklin, Gurindar S. Sohi |
| 1991 | ASPLOS | High-Bandwidth Data Memory Systems for Superscalar Processors. | Gurindar S. Sohi, Manoj Franklin |
| 1991 | ISCA | An Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks. | Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu |
| 1991 | SIGMETRICS | Experience with Mean Value Analysis Models for Evaluating Shared Bus, Throughput-Oriented Multiprocessors. | MenChow Chiang, Gurindar S. Sohi |
| 1990 | ICCD | Exploitation of operation-level parallelism in a processor of the CRAY X-MP. | Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu |
| 1989 | ASPLOS | Tradeoffs in Instruction Format Design for Horizontal Architectures. | Gurindar S. Sohi, Sriram Vajapeyam |
| 1989 | ISCA | Using Feedback to Control Tree Saturation in Multistage Interconnection Networks. | Steven L. Scott, Gurindar S. Sohi |
| 1989 | ICS | Restricted Fetch&Phi operations for parallel processing. | Gurindar S. Sohi, James E. Smith, James R. Goodman |
| 1988 | ISCA | The Performance Potential of Multiple Functional Unit Processors. | Andrew R. Pleszkun, Gurindar S. Sohi |
| 1988 | MICRO | Multiple instruction issue and single-chip processors. | Andrew R. Pleszkun, Gurindar S. Sohi |
| 1987 | ISCA | Organization and Analysis of a Gracefully-Degrading Interleaved Memory System. | Kifung C. Cheung, Gurindar S. Sohi, Kewal K. Saluja, Dhiraj K. Pradhan |
| 1987 | ISCA | Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors. | Gurindar S. Sohi, Sriram Vajapeyam |
| 1985 | ISCA | An Efficient LISP-Execution Architecture with a New Representation for List Structures. | Gurindar S. Sohi, Edward S. Davidson, Janak H. Patel |