Han-Wen Hu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
6
Active years
2018–2026
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | SAC | ReCross: Efficient Embedding Reduction Scheme for In-Memory Computing using ReRAM-Based Crossbar. | Yu-Hong Lai, Chieh-Lin Tsai, Wen Sheng Lim, Han-Wen Hu, Tei-Wei Kuo, Yuan-Hao Chang |
| 2023 | DAC | A digital 3D TCAM accelerator for the inference phase of Random Forest. | Chieh-Lin Tsai, Chun-Feng Wu, Yuan-Hao Chang, Han-Wen Hu, Yung-Chun Lee, Hsiang-Pang Li, Tei-Wei Kuo |
| 2022 | MICRO | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration. | Han-Wen Hu, Wei-Chen Wang, Yuan-Hao Chang, Yung-Chun Lee, Bo-Rong Lin, Huai-Mu Wang, Yen-Po Lin, Yu-Ming Huang, Chong-Ying Lee, Tzu-Hsiang Su, Chih-Chang Hsieh, Chia-Ming Hu, Yi-Ting Lai, Chung Kuang Chen, Han-Sung Chen, Hsiang-Pang Li, Tei-Wei Kuo, Meng-Fan Chang, Keh-Chung Wang, Chun-Hsiung Hung, Chih-Yuan Lu |
| 2021 | ISCAS | Design of Computing-in-Memory (CIM) with Vertical Split-Gate Flash Memory for Deep Neural Network (DNN) Inference Accelerator. | Hang-Ting Lue, Han-Wen Hu, Tzu-Hsuan Hsu, Po-Kai Hsu, Keh-Chung Wang, Chih-Yuan Lu |
| 2019 | ISCA | Sparse ReRAM engine: joint exploration of activation and weight sparsity in compressed neural networks. | Tzu-Hsien Yang, Hsiang-Yun Cheng, Chia-Lin Yang, I-Ching Tseng, Han-Wen Hu, Hung-Sheng Chang, Hsiang-Pang Li |
| 2018 | ICCAD | DL-RSIM: a simulation framework to enable reliable ReRAM-based accelerators for deep learning. | Meng-Yao Lin, Hsiang-Yun Cheng, Wei-Ting Lin, Tzu-Hsien Yang, I-Ching Tseng, Chia-Lin Yang, Han-Wen Hu, Hung-Sheng Chang, Hsiang-Pang Li, Meng-Fan Chang |